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DIMM with eight DDR3 SDRAM devices.
In electronic engineering, DDR3 SDRAM or double-data-rate three synchronous dynamic random access memory is a random access memory interface technology used for high bandwidth storage of the working data of a computer or other digital electronic devices. DDR3 is part of the SDRAM family of technologies and is one of the many DRAM (dynamic random access memory) implementations.
DDR3 SDRAM is an improvement over its predecessor, DDR2 SDRAM. The primary benefit of DDR3 is the ability to transfer twice the data rate of DDR2 (I/O at 8× the data rate of the memory cells it contains), thus enabling higher bus rates and higher peak rates than earlier memory technologies. There is no corresponding reduction in latency, as that is a feature of the DRAM array and not the interface.[citation needed] In addition, the DDR3 standard allows for chip capacities of 512 megabits to 8 gigabits, effectively enabling a maximum memory module size of 16 gigabytes.
It should be emphasized that DDR3 is a DRAM interface specification; the actual DRAM arrays that store the data are the same as in any other type of DRAM, and have similar performance.
[edit] Overview
DDR3 memory provides a reduction in power consumption of 30% compared to DDR2 modules due to DDR3's 1.5 V supply voltage, compared to DDR2's 1.8 V or DDR's 2.5 V. The 1.5 V supply voltage works well with the 90 nanometer fabrication technology used in the original DDR3 chips. Some manufacturers further propose using "dual-gate" transistors to reduce leakage of current.[1]
According to JEDEC[2] the maximum recommended voltage is 1.575 volts and should be considered the absolute maximum when memory stability is the foremost consideration, such as in servers or other mission critical devices. In addition, JEDEC states that memory modules must withstand up to 1.975 volts before incurring permanent damage, although they are not required to function correctly at that level.
The main benefit of DDR3 comes from the higher bandwidth made possible by DDR3's 8 bit deep prefetch buffer, in contrast to DDR2's 4 bit prefetch buffer or DDR's 2 bit buffer.
DDR3 modules can transfer data at a rate of 800–1600 MHz using both rising and falling edges of a 400–800 MHz I/O clock. In comparison, DDR2's current range of data transfer rates is 400–1066 MHz using a 200–533 MHz I/O clock, and DDR's range is 200–400 MHz based on a 100–200 MHz I/O clock. High-performance graphics was an initial driver of such bandwidth requirements, where high bandwidth data transfer between framebuffers is required.
DDR3 prototypes were announced in early 2005. Products in the form of motherboards appeared on the market in June 2007[3] based on Intel's P35 "Bearlake" chipset with DIMMs at bandwidths up to DDR3-1600 (PC3-12800).[4] The Intel Core i7, released in November 2008, connects directly to memory rather than via a chipset. The Core i7 supports only DDR3. AMD's first socket AM3 Phenom II X4 processors, released in February 2009, were their first to support DDR3.
DDR3 DIMMs have 240 pins, the same number as DDR2, and are the same size, but are electrically incompatible and have a different key notch location.[5] DDR3 SO-DIMMs have 204 pins.[6]
GDDR3 memory, having a similar name but being from an entirely dissimilar technology, has been in use for high-end graphic cards by companies such as NVIDIA and ATI Technologies. GDDR3 has sometimes been incorrectly referred to as "DDR3".
[edit] Latencies
While the typical latencies for a JEDEC DDR2 device were 5-5-5-15, the standard latencies for the JEDEC DDR3 devices are 7-7-7-20 for DDR3-1066 and 7-7-7-24 for DDR3-1333.
DDR3 latencies are numerically higher because the clock cycles by which they are measured are shorter; the actual time interval is similar to DDR2 latencies (around 10 ns). There is some improvement because DDR3 generally uses more recent manufacturing processes, but this is not directly caused by the change to DDR3.
As with earlier memory generations, faster DDR3 memory became available after the release of the initial versions. DDR3-2000 memory with 9-9-9-28 latency (9 ns) was available in time to coincide with the Intel Core i7 release.[7] CAS latency of 9 at 1000 Mhz (DDR3-2000) is 9 ns, while CAS latency of 7 at 667 MHz (DDR3-1333) is 10.5 ns.
[edit] Extensions
Intel Corporation officially introduced the eXtended Memory Profile (XMP) Specification on March 23, 2007 to enable enthusiast performance extensions to the traditional JEDEC SPD specifications for DDR3 SDRAM.[8]
[edit] Modules
[edit] JEDEC standard modules
| Standard name | Memory clock | Cycle time | I/O Bus clock | Data rate | Module name | Peak transfer rate | Timings |
| DDR3-800 | 100 MHz | 10 ns | 400 MHz | 800 MT/s | PC3-6400 | 6400 MB/s | 5-5-5
6-6-6 |
| DDR3-1066 | 133 MHz | 7.5 ns | 533 MHz | 1066 MT/s | PC3-8500 | 8533 MB/s | 6-6-6
7-7-7
8-8-8 |
| DDR3-1333 | 166 MHz | 6 ns | 667 MHz | 1333 MT/s | PC3-10600 | 10667 MB/s | 7-7-7
8-8-8
9-9-9
10-10-10 |
| DDR3-1600 | 200 MHz | 5 ns | 800 MHz | 1600 MT/s | PC3-12800 | 12800 MB/s | 8-8-8
9-9-9
10-10-10
11-11-11 |
Note: All above listed are specified by JEDEC as JESD79-3.[9]. All RAM data rates in-between or above these listed specifications are not standardized by JEDEC — often they are simply manufacturer optimizations using higher-tolerance or overvolted chips. Of these non-standard specifications, the highest purported speed reached was equivalent to DDR3-2500.[10]
DDR3-xxx denotes data transfer rate, and describes raw DDR chips, whereas PC3-xxxx denotes theoretical bandwidth (though it is often rounded up or down), and is used to describe assembled DIMMs. Bandwidth is calculated by taking transfers per second and multiplying by eight. This is because DDR3 memory modules transfer data on a bus that is 64 data bits wide, and since a byte comprises 8 bits, this equates to 8 bytes of data per transfer.
In addition to bandwidth and capacity variants, modules can
- Optionally implement ECC, which is an extra data byte lane used for correcting minor errors and detecting major errors for better reliability. Modules with ECC are identified by an additional ECC in their designation. PC3-6400 ECC is a PC3-6400 module with ECC.
- Be "registered", which improves signal integrity (and hence potentially clock rates and physical slot capacity) by electrically buffering the signals with a register, at a cost of an extra clock of increased latency. Those modules are identified by an additional R in their designation, whereas non-registered (a.k.a. "unbuffered") RAM may be identified by an additional U in the designation. PC3-6400R is a registered PC3-6400 module, PC3-6400R ECC is the same module but with additional ECC.
- Be Fully buffered modules, which are designated by F or FB and do not have the same notch position as other classes. Fully buffered modules cannot be used with motherboards that are made for registered modules, and the different notch position physically prevents their insertion.
[edit] Summary
- Features
DDR3 SDRAM Components:
- Introduction of asynchronous RESET pin
- Support of system level flight time compensation
- On-DIMM mirror friendly DRAM pin out
- Introduction of CWL (CAS Write Latency) per clock bin
- On-die I/O calibration engine
- READ and WRITE calibration
DDR3 Modules:
- Fly-by command/address/control bus with on-DIMM termination
- High precision calibration resistors
- Are not backwards compatible -- inserting a DDR3 module into a DDR2 socket can damage the DIMM and/or the motherboard[1]
- Advantages compared with DDR2
- Higher bandwidth performance, effectively up to 1600 MHz
- Improved latencies as measured in nanoseconds.
- Higher performance at low power (longer battery life in laptops)
- Enhanced low power features
- Disadvantages compared with DDR2
- As of April 2009, costs somewhat more than equivalent DDR2 memory
